{"id":218,"date":"2021-09-03T12:10:12","date_gmt":"2021-09-03T03:10:12","guid":{"rendered":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/?p=218"},"modified":"2022-05-31T10:15:06","modified_gmt":"2022-05-31T01:15:06","slug":"hiroyuki-ito","status":"publish","type":"post","link":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/member\/ob-og\/hiroyuki-ito\/","title":{"rendered":"\u4f0a\u85e4 \u5b8f\u5e78 (Hiroyuki Ito)"},"content":{"rendered":"\n
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\u7814\u7a76\u30c6\u30fc\u30de<\/strong>
\u30fb\u30e2\u30ce\u30fb\u30a4\u30f3\u30b9\u30c8\u30e9\u30af\u30b7\u30e7\u30f3\u30bb\u30c3\u30c8\u30fb\u30b3\u30f3\u30d4\u30e5\u30fc\u30bf(MISC)
\u30fbMEMS\u5149\u518d\u69cb\u6210\u30c7\u30d0\u30a4\u30b9<\/p>\n\n\n\n

\u696d\u7e3e<\/strong><\/p>\n\n\n\n

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  1. FPGA Design Countest 2015 Champion
    T. Fujimori, M. Seo, K. Akagi, S. Furukawa,\u00a0H. Ito,<\/strong>\u00a0M. Watanabe
    International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies, June, 2015.<\/li>
  2. Second Prize in FPGA Design Contest 2014,
    T. Fujimori, R. Moriwaki, M. Seo, K. Akagi,\u00a0H. Ito,<\/strong>\u00a0T. Kubota, S. Furukawa, M. Watanabe,
    International Conference on Field-Programmable Technology, Dec. 2014.<\/li>
  3. Third Prize in FPGA Design Contest 2014,
    T. Fujimori, R. Moriwaki, M. Seo, K. Akagi,\u00a0H. Ito,<\/strong>\u00a0T. Kubota, S. Furukawa, M. Watanabe,
    International Conference on Field-Programmable Technology, Dec. 2014.<\/li>
  4. \u5b66\u9577\u8cde\u3000\u53d7\u8cde(ICFPT Design Competition\u512a\u52dd\u306e\u70ba),2014\u5e743\u6708<\/li>
  5. T. Yoza, R. Moriwaki, Y. Torigai, Y. Kamikubo, T. Kubota, T. Watanabe, T. Fujimori,\u00a0H. Ito,<\/strong>\u00a0M. Seo, K. Akagi, Y. Yamaji, M. Watanabe,
    First Place in ICFPT Design Competition 2013,Dec. 2013<\/li>
  6. T. Yoza, R. Moriwaki, Y. Torigai, Y. Kamikubo, T. Kubota, T. Watanabe, T. Fujimori,\u00a0H. Ito,<\/strong>\u00a0M. Seo, K. Akagi, Y. Yamaji, M. Watanabe,
    HDL Champion in ICFPT Design Competition 2013,Dec. 2013.<\/li>
  7. \u68ee\u8107\u70c8\uff0c\u4f59\u5ea7\u8cb4\u5fd7\uff0c\u6e21\u908a\u8cb4\u5f18\uff0c\u9ce5\u98fc\u52c7\u5e0c\uff0c\u4e0a\u7aaa\u52c7\u8cb4\uff0c\u5c71\u5730\u52c7\u4e00\u90ce\uff0c\u7aaa\u7530\u8cb4\u4e4b\uff0c\u4f0a\u85e4\u5b8f\u5e78<\/strong>\uff0c\u6e21\u908a\u5b9f
    \u7b2c3\u56de\u76f8\u78ef\u79c0\u592b\u676f FPGA\u30c7\u30b6\u30a4\u30f3\u30b3\u30f3\u30c6\u30b9\u30c8 \u512a\u52dd 2013\u5e749\u6708<\/li>
  8. \u5b66\u751f\u7814\u7a76\u5968\u52b1\u8cde, \u793e\u56e3\u6cd5\u4eba\u96fb\u5b50\u60c5\u5831\u901a\u4fe1\u5b66\u4f1a\u6771\u6d77\u652f\u90e8, \u4f0a\u85e4\u5b8f\u5e78<\/strong>, 2013\u5e746\u6708\uff0e<\/li>
  9. \u5b66\u9577\u8868\u5f702012\u5e74\u5ea6, \u6e21\u908a\u7814\u7a76\u5ba4<\/li>
  10. \u68ee\u8107\u3001\u4f59\u5ea7\u3001\u4e0a\u7aaa\u3001\u9ce5\u98fc\u3001\u8c37\u5ddd\u3001\u7aaa\u7530\u3001\u4f0a\u85e4<\/strong>\u3001\u767d\u6a4b\u3001\u6e21\u908a
    FPT 2012 Design Competition \u2014 Connect6, \u512a\u52dd, 2012<\/li>
  11. \u68ee\u8107\u3001\u4f59\u5ea7\u3001\u6e21\u908a\u3001\u4e0a\u7aaa\u3001\u9ce5\u98fc\u3001\u767d\u6a4b\u3001\u4f0a\u85e4<\/strong>\u3001\u7aaa\u7530\u3001\u8c37\u5ddd\u3001\u5c71\u5730\u3001\u9752\u5c71\u3001\u702c\u5c3e\u3001\u6e21\u908a
    HERART\u56fd\u969b\u4f1a\u8b70-connect6\u512a\u52dd,2012<\/li><\/ol>\n\n\n\n

    \u5b66\u8853\u8ad6\u6587<\/strong><\/p>\n\n\n\n

    \u56fd\u969b\u5b66\u4f1a<\/strong><\/p>\n\n\n\n

    1. Hiroyuki Ito,<\/strong> M. Watanabe, \u201cTotal-Ionizing Dose Tolerance of the Serial Configuration on Cyclone II FPGA,\u201d
      IEEE International Conference on Space Optical Systems and Applications, pp. 1-4, New Orleans, USA, Oct. 2015<\/strong>.
      DOI: 10.1109\/ICSOS.2015.7425067<\/a> (IEEE Xplore)<\/li>
    2. R. Moriwaki, H. Ito,<\/strong> K. Akagi, M. Watanabe, A. Ogiwara, H. Makawa,
      \u201cTotal ionizing dose effects of optical components on an optically reconfigurable gate array,\u201d
      International Workshop on Applied Reconfigurable Computing, Lecture Notes in Computer Science, Vol. 9040, pp. 393-400, Bochum, Germany, April, 2015<\/strong>.
      DOI:       10.1007\/978-3-319-16214-0_35<\/a> (Sprinter Link)<\/li>
    3. R. Moriwaki, H. Ito,<\/strong> M. Watanabe, A. Ogiwara, H. Maekawa,
      \u201cRadiation tolerance of optically reconfigurable gate arrays,\u201d
      International Symposium Toward the Future of Advanced Researches in Shizuoka University, Shizuoka, Japan, Jan., 2015<\/strong>.<\/li>
    4. T. Yoza, R. Moriwaki, Y. Torigai, Y. Kamikubo, T. Kubota, T. Watanabe, T. Fujimori, H. Ito,<\/strong> M. Seo, K. Akagi, Y. Yamaji, M. Watanabe,
      \u201cFPGA Blokus Duo Solver using a massively parallel architecture,\u201d
      International Conference on Field-Programmable Technology, pp. 494-497, Kyoto, Japan, Dec., 2013<\/strong>.
      DOI:       10.1109\/FPT.2013.6718426<\/a> (IEEE Xplore)<\/li>
    5. H. Ito,<\/strong> M. Watanabe,
      \u201cMono-instruction set computer architecture on a 3D optically reconfigurable gate array,\u201d
      IEEE Electrical Design of Advanced Packaging & Systems, pp. 173-176, Nara, Japan, Dec., 2013<\/strong>.
      DOI:       10.1109\/EDAPS.2013.6724417<\/a> (IEEE Xplore)<\/li>
    6. H. Ito,<\/strong> M. Watanabe,
      \u201cFourier Transformation on an Optically Reconfigurable Gate Array,\u201d
      IEEE International Midwest Symposium on Circuits & Systems, pp. 193-196, USA, Aug., 2013<\/strong>.
      DOI:       10.1109\/MWSCAS.2013.6674618<\/a> (IEEE Xplore)<\/li>
    7. R. Moriwaki, T. Yoza, Y. Kamikubo, Y. Torigai, A. Tanigawa, T. Kubota, H. Ito,<\/strong> Y. Shirahashi, M. Watanabe,
      \u201cA 7-depth search FPGA Connect6 Solver,\u201d
      International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies, pp. 95-98, Edinburgh, United Kingdom, June, 2013<\/strong>.<\/li>
    8. H. Ito,<\/strong> M. Watanabe,
      \u201cPower consumption of mono-instruction set computers (MISCs),\u201d
      IEEE Symposium on Low-Power and High-Speed Chips, CD-ROM, Yokohama, Japan, April, 2013<\/strong>.<\/li>
    9. H. Ito,<\/strong> M. Watanabe,
      \u201cA uniform partitioning method for Mono-Instruction Set Computer (MISC),\u201d
      International Workshop on Renewable Computing Systems, pp. 832 \u2013 837 Melbourne, Australia, Sep., 2012<\/strong>.
      DOI:       10.1109\/NBiS.2012.107<\/a> (IEEE Xplore)<\/li><\/ol>\n\n\n\n

      \u56fd\u5185\u5b66\u4f1a<\/strong><\/p>\n\n\n\n

      1. \u4f0a\u85e4\u5b8f\u5e78<\/strong>\uff0c\u68ee\u8107\u3000\u70c8\uff0c\u6e21\u908a\u3000\u5b9f\uff0c\u300c\u5149\u518d\u69cb\u6210\u578b\u30b2\u30fc\u30c8\u30a2\u30ec\u30a4\u306e\u4e26\u5217\u69cb\u6210\u6cd5\u306e\u653e\u5c04\u7dda\u8010\u6027\u306b\u95a2\u3059\u308b\u4e00\u8003\u5bdf\u300d\uff0c
        \u96fb\u5b50\u60c5\u5831\u901a\u4fe1\u5b66\u4f1a\u6280\u8853\u7814\u7a76\u5831\u544a\uff08\u30ea\u30b3\u30f3\u30d5\u30a3\u30ae\u30e3\u30e9\u30d6\u30eb\u30b7\u30b9\u30c6\u30e0\u7814\u7a76\u4f1a\uff09\uff0cpp. 31-34, \u6176\u5fdc\u5927\u5b66\uff0c1\u670829\u65e5\uff0c2015\uff0e<\/li>
      2. \u68ee\u8107\u70c8\uff0c\u4f0a\u85e4\u5b8f\u5e78<\/strong>\uff0c\u524d\u5ddd\u8f1d\uff0c\u6e21\u908a\u5b9f\uff0c\u837b\u539f\u662d\u6587\uff0c\u300c\u5149\u518d\u69cb\u6210\u578b\u30b2\u30fc\u30c8\u30a2\u30ec\u30a4\u306e\u30db\u30ed\u30b0\u30e9\u30e0\u30e1\u30e2\u30ea\u90e8\u306e\u653e\u5c04\u7dda\u8010\u6027\u300d\uff0c
        \u96fb\u5b50\u60c5\u5831\u901a\u4fe1\u5b66\u4f1a\u6280\u8853\u7814\u7a76\u5831\u544a\uff08\u30ea\u30b3\u30f3\u30d5\u30a3\u30ae\u30e3\u30e9\u30d6\u30eb\u30b7\u30b9\u30c6\u30e0\u7814\u7a76\u4f1a\uff09\uff0cpp. 19-22\uff0c\u675c\u306e\u5bbf\uff08\u5bae\u5cf6\uff09 \uff0c9\u670818\u65e5\uff0c2014\uff0e<\/li>
      3. \u4f0a\u85e4\u5b8f\u5e78<\/strong>\uff0c\u6e21\u908a\u5b9f\uff0c\u300c\u30e2\u30ce\u30fb\u30a4\u30f3\u30b9\u30c8\u30e9\u30af\u30b7\u30e7\u30f3\u30fb\u30bb\u30c3\u30c8\u30fb\u30b3\u30f3\u30d4\u30e5\u30fc\u30bf\u306e\u5b9f\u88c5\u300d\uff0c
        \u5352\u696d\u7814\u7a76\u767a\u8868\u4f1a\uff0c\u96fb\u5b50\u60c5\u5831\u901a\u4fe1\u5b66\u4f1a \u6771\u6d77\u652f\u90e8\uff0cpp. **-**, \u540d\u53e4\u5c4b\u5927\u5b66\uff0c3\u6708\uff0c2013\uff0e<\/li>
      4. \u4f0a\u85e4\u5b8f\u5e78<\/strong>\uff0c\u6e21\u908a\u5b9f\uff0c\u300c28nm\u30d7\u30ed\u30bb\u30b9FPGA\u3078\u306e\u30e2\u30ce\u30fb\u30a4\u30f3\u30b9\u30c8\u30e9\u30af\u30b7\u30e7\u30f3\u30fb\u30bb\u30c3\u30c8\u30fb\u30b3\u30f3\u30d4\u30e5\u30fc\u30bf\u306e\u5b9f\u88c5\u300d\uff0c
        \u9759\u5ca1\u5730\u533a\u8a08\u6e2c\u5236\u5fa1\u7814\u7a76\u767a\u8868\u4f1a\uff0cpp. 7-8, 12\u6708\uff0c2012.<\/li>
      5. \u4f0a\u85e4\u5b8f\u5e78<\/strong>\uff0c\u6e21\u908a\u5b9f\uff0c\u300c\u30e2\u30ce\u30fb\u30a4\u30f3\u30b9\u30c8\u30e9\u30af\u30b7\u30e7\u30f3\u30fb\u30bb\u30c3\u30c8\u30fb\u30b3\u30f3\u30d4\u30e5\u30fc\u30bf(MISC)\u306e\u6d88\u8cbb\u96fb\u529b\u89e3\u6790\u300d
        \u96fb\u5b50\u60c5\u5831\u901a\u4fe1\u5b66\u4f1a\u6280\u8853\u7814\u7a76\u5831\u544a(VLSI\u8a2d\u8a08\u6280\u8853\u7814\u7a76\u4f1a),
        vol.112, no.245, pp.35-38,\u5ca9\u624b\u770c,\u30db\u30c6\u30eb\u30eb\u30a4\u30ba\uff0c10\u6708, 2012<\/li>
      6. \u4f0a\u85e4\u5b8f\u5e78<\/strong>\uff0c\u6e21\u908a\u5b9f\uff0c\u300c\u30e2\u30ce\u30fb\u30a4\u30f3\u30b9\u30c8\u30e9\u30af\u30b7\u30e7\u30f3\u30fb\u30bb\u30c3\u30c8\u30fb\u30b3\u30f3\u30d4\u30e5\u30fc\u30bf\uff08MISC\uff09\u306e\u4e26\u5217\u5b9f\u88c5\u300d
        \u96fb\u6c17\u95a2\u4fc2\u5b66\u4f1a\u6771\u6d77\u652f\u90e8\u9023\u5408\u5927\u4f1a\uff0cCD-ROM, \u8c4a\u6a4b\u6280\u8853\u79d1\u5b66\u5927\u5b66\uff0c9\u6708\uff0c2012\uff0e<\/li><\/ol>\n\n\n\n

        \u6240\u5c5e\u5b66\u4f1a<\/strong>
        \u30fbIEEE\u3000\u3000\u3000\u5b66\u751f\u4f1a\u54e1
        \u30fb\u96fb\u5b50\u60c5\u5831\u901a\u4fe1\u5b66\u4f1a\u3000\u3000\u3000\u5b66\u751f\u4f1a\u54e1<\/p>\n","protected":false},"excerpt":{"rendered":"

        \u8da3\u5473\uff1a\u30d0\u30a4\u30af \u7814\u7a76\u30c6\u30fc\u30de\u30fb\u30e2\u30ce\u30fb\u30a4\u30f3\u30b9\u30c8<\/p>\n","protected":false},"author":3,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"template-fullwidth.php","format":"standard","meta":{"_jetpack_memberships_contains_paid_content":false,"footnotes":""},"categories":[3,4],"tags":[],"class_list":["post-218","post","type-post","status-publish","format-standard","hentry","category-ob-og","category-member"],"jetpack_sharing_enabled":true,"jetpack_featured_media_url":"","_links":{"self":[{"href":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/wp-json\/wp\/v2\/posts\/218","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/wp-json\/wp\/v2\/users\/3"}],"replies":[{"embeddable":true,"href":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/wp-json\/wp\/v2\/comments?post=218"}],"version-history":[{"count":4,"href":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/wp-json\/wp\/v2\/posts\/218\/revisions"}],"predecessor-version":[{"id":479,"href":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/wp-json\/wp\/v2\/posts\/218\/revisions\/479"}],"wp:attachment":[{"href":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/wp-json\/wp\/v2\/media?parent=218"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/wp-json\/wp\/v2\/categories?post=218"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/wp-json\/wp\/v2\/tags?post=218"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}