{"id":196,"date":"2021-09-03T12:02:00","date_gmt":"2021-09-03T03:02:00","guid":{"rendered":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/?p=196"},"modified":"2021-09-07T11:36:36","modified_gmt":"2021-09-07T02:36:36","slug":"retsu-moriwaki","status":"publish","type":"post","link":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/member\/ob-og\/retsu-moriwaki\/","title":{"rendered":"\u68ee\u8107 \u70c8 (Retsu Moriwaki)"},"content":{"rendered":"\n
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\u7814\u7a76\u30c6\u30fc\u30de<\/strong>
\u30fb\u5149\u518d\u69cb\u6210\u578b\u30b2\u30fc\u30c8\u30a2\u30ec\u30a4VLSI\u306e\u7814\u7a76\u958b\u767a<\/p>\n\n\n\n

\u7d4c\u6b74<\/strong>
2005\u5e743\u6708\u3000\u9ad8\u77e5\u770c\u7acb\u9ad8\u77e5\u5c0f\u6d25\u9ad8\u7b49\u5b66\u6821\u3000\u5352\u696d
2005\u5e744\u6708\u3000\u9759\u5ca1\u5927\u5b66\u5de5\u5b66\u90e8\u96fb\u6c17\u96fb\u5b50\u5de5\u5b66\u79d1\u3000\u5165\u5b66
2008\u5e744\u6708\u30001\u5e74\u9593\u4f11\u5b66\u3057\u3001\u30a4\u30b9\u30e9\u30a8\u30eb\u306e\u30ad\u30d6\u30c4\u30fb\u30a8\u30a4\u30f3\u30cf\u30b7\u30e7\u30d5\u30a7\u30c3\u30c8\u306b\u3066\u8a9e\u5b66\u7559\u5b66(\u30d8\u30d6\u30e9\u30a4\u8a9e)
2010\u5e743\u6708\u3000\u9759\u5ca1\u5927\u5b66\u5de5\u5b66\u90e8\u96fb\u6c17\u96fb\u5b50\u5de5\u5b66\u79d1\u3000\u5352\u696d
2010\u5e744\u6708\u3000\u9759\u5ca1\u5927\u5b66\u5927\u5b66\u9662\u5de5\u5b66\u7814\u7a76\u79d1\u96fb\u6c17\u96fb\u5b50\u5de5\u5b66\u5c02\u653b\u3000\u5165\u5b66
2012\u5e743\u6708\u3000\u9759\u5ca1\u5927\u5b66\u5927\u5b66\u9662\u5de5\u5b66\u7814\u7a76\u79d1\u96fb\u6c17\u96fb\u5b50\u5de5\u5b66\u5c02\u653b\u3000\u5352\u696d
2012\u5e744\u6708\u3000\u9759\u5ca1\u5927\u5b66\u5927\u5b66\u9662\u81ea\u7136\u79d1\u5b66\u7cfb\u6559\u80b2\u90e8\u30ca\u30ce\u30d3\u30b8\u30e7\u30f3\u5de5\u5b66\u5c02\u653b\u3000\u5165\u5b66
2013\u5e744\u6708\u3000\u65e5\u672c\u5b66\u8853\u632f\u8208\u4f1a\u7279\u5225\u7814\u7a76\u54e1\uff08DC2\uff09\u63a1\u7528<\/p>\n\n\n\n

\u696d\u7e3e<\/strong><\/p>\n\n\n\n

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  1. Second Prize in FPGA Design Contest 2014,
    T. Fujimori, R. Moriwaki,<\/strong> M. Seo, K. Akagi, H. Ito, T. Kubota, S. Furukawa, M. Watanabe,
    International Conference on Field-Programmable Technology, Dec. 2014.<\/li>
  2. Third Prize in FPGA Design Contest 2014,
    T. Fujimori, R. Moriwaki,<\/strong> M. Seo, K. Akagi, H. Ito, T. Kubota, S. Furukawa, M. Watanabe,
    International Conference on Field-Programmable Technology, Dec. 2014.<\/li>
  3. Winner of the Open League in FPGA Design Contest 2014 AISO CUP,
    T. Fujimori, M. Seo, K. Akagi, R. Moriwaki,<\/strong> T. Yoza, Y. Torigai, M. Watanabe,
    International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies, June, 2014.<\/li>
  4. Champion of the Regulation League in FPGA Design Contest 2014 AISO CUP,
    T. Fujimori, M. Seo, K. Akagi, R. Moriwaki,<\/strong> T. Yoza, Y. Torigai, M. Watanabe,
    International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies, June, 2014.<\/li>
  5. HDL Champion of the Regulation League in FPGA Design Contest 2014 AISO CUP,
    T. Fujimori, M. Seo, K. Akagi, R. Moriwaki,<\/strong> T. Yoza, Y. Torigai, M. Watanabe,
    International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies, June, 2014.<\/li>
  6. \u5b66\u9577\u8cde\u3000\u53d7\u8cde(ICFPT Design Competition\u512a\u52dd\u306e\u70ba)<\/li>
  7. T. Yoza, R. Moriwaki,<\/strong> Y. Torigai, Y. Kamikubo, T. Kubota, T. Watanabe, T. Fujimori, H. Ito, M. Seo, K. Akagi, Y. Yamaji, M. Watanabe,
    First Place in ICFPT Design Competition 2013,Dec. 2013<\/li>
  8. T. Yoza, R. Moriwaki,<\/strong> Y. Torigai, Y. Kamikubo, T. Kubota, T. Watanabe, T. Fujimori, H. Ito, M. Seo, K. Akagi, Y. Yamaji, M. Watanabe,
    HDL Champion in ICFPT Design Competition 2013,Dec. 2013.<\/li>
  9. \u68ee\u8107\u70c8\uff0c<\/strong>\u4f59\u5ea7\u8cb4\u5fd7\uff0c\u6e21\u908a\u8cb4\u5f18\uff0c\u9ce5\u98fc\u52c7\u5e0c\uff0c\u4e0a\u7aaa\u52c7\u8cb4\uff0c\u5c71\u5730\u52c7\u4e00\u90ce\uff0c\u7aaa\u7530\u8cb4\u4e4b\uff0c\u4f0a\u85e4\u5b8f\u5e78\uff0c\u6e21\u908a\u5b9f
    \u7b2c3\u56de\u76f8\u78ef\u79c0\u592b\u676f FPGA\u30c7\u30b6\u30a4\u30f3\u30b3\u30f3\u30c6\u30b9\u30c8 \u512a\u52dd 2013\u5e749\u6708<\/li>
  10. \u5b66\u9577\u8868\u5f702012\u5e74\u5ea6, \u6e21\u908a\u7814\u7a76\u5ba4<\/li>
  11. \u68ee\u8107<\/strong>\u3001\u4f59\u5ea7\u3001\u4e0a\u7aaa\u3001\u9ce5\u98fc\u3001\u8c37\u5ddd\u3001\u7aaa\u7530\u3001\u4f0a\u85e4\u3001\u767d\u6a4b\u3001\u6e21\u908a
    FPT 2012 Design Competition \u2014 Connect6, \u512a\u52dd, 2012<\/li>
  12. \u68ee\u8107<\/strong>\u3001\u4f59\u5ea7\u3001\u6e21\u8fba\u3001\u4e0a\u7aaa\u3001\u9ce5\u98fc\u3001\u767d\u6a4b\u3001\u4f0a\u85e4\u3001\u7aaa\u7530\u3001\u8c37\u5ddd\u3001\u5c71\u5730\u3001\u9752\u5c71
    \u702c\u5c3e\u3001\u6e21\u908aHEART\u56fd\u969b\u4f1a\u8b70-connect6\u512a\u52dd,2012<\/li>
  13. \u5b66\u9577\u8868\u5f702011\u5e74\u5ea6, \u6e21\u908a\u7814\u7a76\u5ba4<\/li>
  14. \u793e\u4f1a\u4eba\u57fa\u790e\u529b\u80b2\u6210\u30b0\u30e9\u30f3\u30d7\u30ea2012\u6c7a\u52dd\u5927\u4f1a, \u6e96\u5927\u8cde<\/li>
  15. FPT 2011 Design Competition \u2014 Connect6, \u512a\u52dd, 2011<\/li>
  16. \u793e\u4f1a\u4eba\u57fa\u790e\u529b\u80b2\u6210\u30b0\u30e9\u30f3\u30d7\u30ea2012\u95a2\u6771\u5730\u533a\u4e88\u9078\u5927\u4f1a, \u512a\u79c0\u8cde<\/li>
  17. \u6e21\u8fba\u8cb4\u5f18,\u68ee\u8107\u70c8,<\/strong>\u5c71\u5730\u52c7\u4e00\u90ce,\u4e0a\u7aaa\u52c7\u8cb4,\u9ce5\u98fc\u52c7\u5e0c,\u4ec1\u5e73\u512a\u57fa,\u4f59\u5ea7\u8cb4\u5fd7,\u4e0a\u91ce\u7531\u7f8e\u5b50,\u9752\u5c71\u88d5\u53f8,\u6e21\u908a\u5b9f,
    \u7b2c1\u56de \u76f8\u78ef\u79c0\u592b\u676f FPGA\u30c7\u30b6\u30a4\u30f3\u30b3\u30f3\u30c6\u30b9\u30c8\u3000\u512a\u52dd, 2011<\/li>
  18. \u56fd\u969b\u4f1a\u8b70\u7814\u7a76\u767a\u8868\u8cde, 2011<\/li>
  19. \u96fb\u5b50\u60c5\u5831\u901a\u4fe1\u5b66\u4f1a\u6771\u6d77\u652f\u90e8 \u5b66\u751f\u7814\u7a76\u5968\u52b1\u8cde, 2011<\/li>
  20. T. Mabuchi, T. Watanabe, R. Moriwaki,<\/strong> Y. Aoyama, A. Gundjalam, Y. Yamaji, H. Nakada, M. Watanabe,
    Certificate in Design Competition, The 2010 International Conference on Field-Programmable Technology, Dec., 2010<\/li><\/ol>\n\n\n\n

    \u5b66\u8853\u8ad6\u6587<\/strong><\/p>\n\n\n\n

    1. A. Ogiwara, M. Watanabe, R. Moriwaki,<\/strong>
      \u201cTemperature dependence of anisotropic diffraction in holographic polymer-dispersed liquid crystal memory,\u201d
      Applied Optics, Vol. 52, Issue 26, pp. 6529-6536, Sep., 2013<\/strong>.<\/li>
    2. A. Ogiwara, M. Watanabe, R. Moriwaki,<\/strong>
      \u201cFormation of temperature dependable holographic memory using holographic polymer dispersed liquid crystal,\u201d
      Optics letters, Vol. 38, Issue 7, pp. 1158\u20131160, April, 2013<\/strong>.<\/li>
    3. R. Moriwaki,<\/strong> M. Watanabe,
      \u201cOptical configuration acceleration on a new optically reconfigurable gate array VLSI using a negative logic implementation,\u201d
      Applied Optics, Vol. 52, No. 9, pp. 1939\u20131946, March, 2013<\/strong>.
      DOI: 10.1364\/AO.52.001939 (OSA Publishing: Open Access)[Paper]<\/a><\/li><\/ol>\n\n\n\n

      \u56fd\u969b\u5b66\u4f1a<\/strong><\/p>\n\n\n\n

      1. R. Moriwaki,<\/strong> H. Ito, K. Akagi, M. Watanabe, A. Ogiwara, H. Makawa,
        \u201cTotal ionizing dose effects of optical components on an optically reconfigurable gate array,\u201d
        International Workshop on Applied Reconfigurable Computing, Lecture Notes in Computer Science, Vol. 9040, pp. 393-400, Bochum, Germany, April, 2015<\/strong>.
        DOI:         10.1007\/978-3-319-16214-0_35<\/a> (Sprinter Link)<\/li>
      2. R. Moriwaki,<\/strong> H. Ito, M. Watanabe, A. Ogiwara, H. Maekawa,
        \u201cRadiation tolerance of optically reconfigurable gate arrays,\u201d
        International Symposium Toward the Future of Advanced Researches in Shizuoka University, Shizuoka, Japan, Jan., 2015<\/strong>.<\/li>
      3. R. Moriwaki,<\/strong> H. Maekawa, A. Ogiwara, M. Watanabe,
        \u201cAn optically reconfigurable gate array with an angle-multiplexed holographic memory,\u201d
        IEEE\/ACM Great Lake Symposium on Very Large Scale Integrated circuits, pp. 341-346, Texas, USA, May, 2014<\/strong>.
        DOI:         10.1145\/2591513.2591597<\/a> (ACM DIGITAL LIBRARY)<\/li>
      4. A. Ogiwara, H. Maekawa, M. Watanabe, R. Moriwaki,<\/strong>
        \u201cFormation of holographic memory for optically-reconfigurable gate array by angle-multiplexing recording of multi-circuit information in liquid-crystal composites,\u201d
        Proceedings of SPIE, Vol. 9004, pp. 90040M-1-90040M-8, San Francisco, USA, Feb., 2014<\/strong>.
        DOI:         10.1109\/CLEOPR.2015.7376567<\/a> (IEEE Xplore)<\/li>
      5. T. Yoza, R. Moriwaki,<\/strong> Y. Torigai, Y. Kamikubo, T. Kubota, T. Watanabe, T. Fujimori, H. Ito, M. Seo, K. Akagi, Y. Yamaji, M. Watanabe,
        \u201cFPGA Blokus Duo Solver using a massively parallel architecture,\u201d
        International Conference on Field-Programmable Technology, pp. 494-497, Kyoto, Japan, Dec., 2013<\/strong>.
        DOI:         10.1109\/FPT.2013.6718426<\/a> (IEEE Xplore)<\/li>
      6. A. Ogiwara, H. Maekawa, M. Watanabe, R. Moriwaki,<\/strong>
        \u201cAngle-multiplexing recording of multi-context for optically reconfigurable gate array in holographic memory using liquid crystal composites,\u201d
        Microoptics Conference (MOC\u201913), Tokyo, Japan, Oct., 2013<\/strong> (accepted).
        http:\/\/ieeexplore.ieee.org\/document\/6715109\/<\/a> (IEEE Xplore)<\/li>
      7. R. Moriwaki,<\/strong> M. Watanabe,
        \u201cA fine-grained dependable optically reconfigurable gate array as a multi-soft-core processor platform,\u201d
        IEEE 7th International Symposium on Embedded Multicore SoCs, pp. 7-12, Tokyo, Japan, Sep., 2013<\/strong>.
        DOI:         10.1109\/MCSoC.2013.33<\/a> (IEEE Xplore)<\/li>
      8. R. Moriwaki,<\/strong> M. Watanabe, A. Ogiwara,
        \u201cConfiguration on an optically reconfigurable gate array under the maximum 120\u00b0C temperature condition,\u201d
        OptoElectronics and Communications Conference, pp. 1-2, Kyoto, Japan, July, 2013<\/strong>.
        http:\/\/ieeexplore.ieee.org\/document\/6597390\/<\/a> (IEEE Xplore)<\/li>
      9. A. Ogiwara, H. Maekawa, M. Watanabe, R. Moriwaki,<\/strong>
        \u201cFormation of Holographic Memory by Recording of Multi-context in Liquid Crystal Composites,\u201d
        Conference on Lasers and Electro-Optics Pacific Rim, pp. 1-2, Kyoto, Japan, July, 2013<\/strong>.
        DOI:         10.1109\/CLEOPR.2013.6600439<\/a> (IEEE Xplore)<\/li>
      10. R. Moriwaki,<\/strong> T. Yoza, Y. Kamikubo, Y. Torigai, A. Tanigawa, T. Kubota, H. Ito, Y. Shirahashi, M. Watanabe,
        \u201cA 7-depth search FPGA Connect6 Solver,\u201d
        International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies, pp. 95-98, Edinburgh, United Kingdom, June, 2013<\/strong>.<\/li>
      11. A. Ogiwara, M. Watanabe, R. Moriwaki,<\/strong>
        \u201cTemperature Dependable Holographic Memory Using Holographic Polymer-dispersed Liquid Crystal,\u201d
        Progress In Electromagnetics Research Symposium, pp. 322-325, Taipei, Taiwan, March, 2013<\/strong>.<\/li>
      12. R. Moriwaki,<\/strong> M. Watanabe, A. Ogiwara,
        \u201cA 9-configuration-contextoptically reconfigurable gate array using a polymer-dispersed liquid crystal holographic memory,\u201d
        Takayanagi Kenjiro Memorial Symposium, pp. S3_10_1 \u2013 S3_10_4, Shizuoka, Japan, Nov., 2012<\/strong>.<\/li>
      13. R. Moriwaki,<\/strong> M. Watanabe,
        \u201cOptical configuration acceleration on a new optically reconfigurable gate array VLSI using a negative logic implementation,\u201d
        International Conference on engineering of reconfigurable systems and algorithms, pp. 127-132, Las Vegas, USA, July, 2012<\/strong>.<\/li>
      14. R. Moriwaki,<\/strong> T. Yoza, Y. Kamikubo, Y. Torigai, T. Watanabe, Y. Aoyama, M. Seo, M. Watanabe,
        \u201cFPGA Connect6 Solver with Hardware Sort Units,\u201d
        International Workshop on Highly Efficient Accelerators and Reconfigurable Technologies, pp. 163-166, Okinawa, Japan, May, 2012<\/strong>.<\/li>
      15. T. Watanabe, R. Moriwaki,<\/strong> Y. Yamaji, Y. Kamikubo, Y. Torigai, Y. Nihira, T. Yoza, Y. Ueno, Y. Aoyama, M. Watanabe,
        \u201cAn FPGA Connect6 Solver with a Two-Stage Pipelined Evaluation,\u201d
        IEEE International Conference on Field-Programmable Technology, CD-ROM, New Delhi, India, Dec., 2011<\/strong>.
        DOI:         10.1109\/FPT.2011.6133249<\/a> (IEEE Xplore)<\/li>
      16. R. Moriwaki,<\/strong> M. Watanabe, A. Ogiwara, F. Kobayashi,
        \u201d Multi-context optically reconfigurable gate array using a polymer-dispersed liquid crystal holographic memory, \u201d
        MICROOPTICS CONFERENCE, pp. 1-2, Sendai, Japan, Nov., 2011<\/strong>.
        http:\/\/ieeexplore.ieee.org\/document\/6110329\/<\/a>(IEEE Xplore)<\/li>
      17. R. Moriwaki,<\/strong> M. Watanabe,
        \u201cA configuration speed acceleration method for a sequential circuit using a negative logic implementation,\u201d
        IEEE International Conference on Space Optical Systems and Applications, pp. 213-217, Santa Monica, USA, May, 2011<\/strong>.
        DOI:         10.1109\/ICSOS.2011.5783670<\/a> (IEEE Xplore)<\/li>
      18. R. Moriwaki,<\/strong> M. Watanabe,
        \u201cBackground light effect of a dynamically reconfigurable vision-chip architecture,\u201d
        IEEE International Symposium on System Integration, pp. 426-430, Sendai, Japan, Dec., 2010<\/strong>.
        DOI:         10.1109\/SII.2010.5708363<\/a> (IEEE Xplore)<\/li>
      19. T. Mabuchi, T. Watanabe, R. Moriwaki,<\/strong> Y. Aoyama, A. Gundjalam, Y. Yamaji, H. Nakada, M. Watanabe,
        \u201cOthello solver based on a soft-core MIMD processor array,\u201d
        IEEE International Conference on Field-Programmable Technology, pp.511-514, Beijing, China, Dec., 2010<\/strong>.
        DOI:         10.1109\/FPT.2010.5681470<\/a> (IEEE Xplore)<\/li>
      20. R. Moriwaki,<\/strong> M. Watanabe,
        \u201cPower reduction method using negative logic implementation,\u201d
        IEEE Symposium on Low-Power and High-Speed Chips, p. 192, Yokohama, Japan, April, 2010<\/strong>.<\/li>
      21. R. Moriwaki,<\/strong> M. Watanabe,
        \u201cAn optical configuration acceleration method using negative logic implementation,\u201d
        International Conference on Emerging Trends in Electronic and Photonic Devices & Systems, pp. 552 \u2013 555, Varanasi, INDIA, Dec., 2009<\/strong>.
        DOI:         10.1109\/ELECTRO.2009.5441043<\/a> (IEEE Xplore)<\/li><\/ol>\n\n\n\n

        \u56fd\u5185\u5b66\u4f1a<\/strong><\/p>\n\n\n\n

        1. \u4f0a\u85e4\u5b8f\u5e78\uff0c\u68ee\u8107\u3000\u70c8\uff0c<\/strong>\u6e21\u908a\u3000\u5b9f\uff0c\u300c\u5149\u518d\u69cb\u6210\u578b\u30b2\u30fc\u30c8\u30a2\u30ec\u30a4\u306e\u4e26\u5217\u69cb\u6210\u6cd5\u306e\u653e\u5c04\u7dda\u8010\u6027\u306b\u95a2\u3059\u308b\u4e00\u8003\u5bdf\u300d\uff0c
          \u96fb\u5b50\u60c5\u5831\u901a\u4fe1\u5b66\u4f1a\u6280\u8853\u7814\u7a76\u5831\u544a\uff08\u30ea\u30b3\u30f3\u30d5\u30a3\u30ae\u30e3\u30e9\u30d6\u30eb\u30b7\u30b9\u30c6\u30e0\u7814\u7a76\u4f1a\uff09\uff0cpp. 31-34, \u6176\u5fdc\u5927\u5b66\uff0c1\u670829\u65e5\uff0c2015\uff0e<\/li>
        2. \u68ee\u8107\u70c8\uff0c<\/strong>\u4f0a\u85e4\u5b8f\u5e78\uff0c\u524d\u5ddd\u8f1d\uff0c\u6e21\u908a\u5b9f\uff0c\u837b\u539f\u662d\u6587\uff0c\u300c\u5149\u518d\u69cb\u6210\u578b\u30b2\u30fc\u30c8\u30a2\u30ec\u30a4\u306e\u30db\u30ed\u30b0\u30e9\u30e0\u30e1\u30e2\u30ea\u90e8\u306e\u653e\u5c04\u7dda\u8010\u6027\u300d\uff0c
          \u96fb\u5b50\u60c5\u5831\u901a\u4fe1\u5b66\u4f1a\u6280\u8853\u7814\u7a76\u5831\u544a\uff08\u30ea\u30b3\u30f3\u30d5\u30a3\u30ae\u30e3\u30e9\u30d6\u30eb\u30b7\u30b9\u30c6\u30e0\u7814\u7a76\u4f1a\uff09\uff0cpp. 19-22\uff0c\u675c\u306e\u5bbf\uff08\u5bae\u5cf6\uff09 \uff0c9\u670818\u65e5\uff0c2014\uff0e<\/li>
        3. \u837b\u539f\u662d\u6587\uff0c\u524d\u5ddd \u8f1d\uff0c\u6e21\u908a \u5b9f\uff0c\u68ee\u8107 \u70c8\uff0c<\/strong>\u300c\u89d2\u5ea6\u591a\u91cd\u8a18\u9332\u306b\u3088\u308b\u6db2\u6676\u30db\u30ed\u30b0\u30e9\u30e0\u30e1\u30e2\u30ea\u3092\u7528\u3044\u305f\u5149\u518d\u69cb\u6210\u8a66\u9a13\u300d
          \u7b2c61\u56de\u5fdc\u7528\u7269\u7406\u5b66\u4f1a\u6625\u5b63\u5b66\u8853\u8b1b\u6f14\u4f1a\uff0c\u9752\u5c71\u5b66\u9662\u5927\u5b66\uff0c3\u670818\u65e5\uff0c2014.<\/li>
        4. \u68ee\u8107\u70c8\uff0c<\/strong>\u6e21\u908a\u5b9f\uff0c\u300c\u8ca0\u8ad6\u7406\u56de\u8def\u5b9f\u88c5\u3092\u6d3b\u7528\u3057\u305f\u5149\u518d\u69cb\u6210\u578b\u30b2\u30fc\u30c8\u30a2\u30ec\u30a4\u306e\u653e\u5c04\u7dda\u8010\u6027\u306e\u5411\u4e0a\u624b\u6cd5\u300d
          \u5b87\u5b99\u79d1\u5b66\u6280\u8853\u9023\u5408\u8b1b\u6f14\u4f1a\uff0c\u7c73\u5b50\u30b3\u30f3\u30d9\u30f3\u30b7\u30e7\u30f3\u30bb\u30f3\u30bf\u30fc\uff0c10\u67089\u65e5\uff0c2013.<\/li>
        5. \u524d\u5ddd \u8f1d\uff0c\u837b\u539f\u662d\u6587\uff0c\u6e21\u908a \u5b9f\uff0c\u68ee\u8107 \u70c8\uff0c<\/strong>\u300c\u5149\u518d\u69cb\u6210\u7528\u30b3\u30f3\u30c6\u30ad\u30b9\u30c8\u30c7\u30fc\u30bf\u306e\u6db2\u6676\u30db\u30ed\u30b0\u30e9\u30e0\u3078\u306e\u89d2\u5ea6\u591a\u91cd\u8a18\u9332\u300d\uff0c
          \u5fdc\u7528\u7269\u7406\u5b66\u4f1a\u79cb\u5b63\u5b66\u8853\u8b1b\u6f14\u4f1a\uff0cp.*\uff0c\u540c\u5fd7\u793e\u5927\u5b66\uff0c9\u6708\uff0c2013.<\/li>
        6. \u837b\u539f \u662d\u6587\uff0c\u5fd7\u667a \u5f18\uff0c\u6e21\u908a\u5b9f\uff0c\u68ee\u8107 \u70c8\uff0c<\/strong>\u300c\u5149\u518d\u69cb\u6210\u578b\u30b2\u30fc\u30c8\u30a2\u30ec\u30a4\u7528\u6db2\u6676\u30db\u30ed\u30b0\u30e9\u30e0\u30e1\u30e2\u30ea\u306e\u6e29\u5ea6\u4f9d\u5b58\u6027\u300d\uff0c
          \u5fdc\u7528\u7269\u7406\u5b66\u4f1a\u6625\u5b63\u5b66\u8853\u8b1b\u6f14\u4f1a\uff0cp. *, \u795e\u5948\u5ddd\u5de5\u79d1\u5927\u5b66\uff0c3\u6708\uff0c2013.<\/li>
        7. \u68ee\u8107\u70c8\uff0c<\/strong>\u6e21\u908a\u5b9f\uff0c\u837b\u539f\u662d\u6587\uff0c\u300c\u504f\u5149\u4f9d\u5b58\u6027\u30db\u30ed\u30b0\u30e9\u30e0\u30e1\u30e2\u30ea\u3092\u7528\u3044\u305f9\u30b3\u30f3\u30c6\u30ad\u30b9\u30c8\u5149\u518d\u69cb\u6210\u578b\u30b2\u30fc\u30c8\u30a2\u30ec\u30a4\u300d\uff0c
          \u96fb\u5b50\u60c5\u5831\u901a\u4fe1\u5b66\u4f1a\u6280\u8853\u7814\u7a76\u5831\u544a\uff08\u30ea\u30b3\u30f3\u30d5\u30a3\u30ae\u30e3\u30e9\u30d6\u30eb\u30b7\u30b9\u30c6\u30e0\u7814\u7a76\u4f1a\uff09
          Vol. 112\uff0cNo. 325\uff0cReconf2012-46-Reconf2012-60\uff0cpp. 29-32\uff0c\u4e5d\u5dde\u5927\u5b66\u533b\u5b66\u90e8\u767e\u5e74\u8b1b\u5802\uff0c11\u6708\uff0c2012<\/li>
        8. \u68ee\u8107<\/strong>\uff0c\u6e21\u908a\u5b9f\uff0c\u300c\u660e\u70b9\u30d3\u30c3\u30c8\u6570\u306e\u6700\u5c0f\u5316\u306b\u3088\u308b\u9806\u5e8f\u56de\u8def\u306e\u9ad8\u901f\u69cb\u6210\u624b\u6cd5\u300d\uff0c
          LSI\u3068\u30b7\u30b9\u30c6\u30e0\u306e\u30ef\u30fc\u30af\u30b7\u30e7\u30c3\u30d7, \u8b1b\u6f14\u8cc7\u6599\u96c6\u304a\u3088\u3073\u30dd\u30b9\u30bf\u30fc\u8cc7\u6599\u96c6, pp. 185-187, \u5317\u4e5d\u5dde\u56fd\u969b\u4f1a\u8b70\u5834, 5\u6708, 2010.<\/li>
        9. \u68ee\u8107<\/strong>\uff0c\u6e21\u908a\u5b9f\uff0c\u300c\u8ca0\u8ad6\u7406\u56de\u8def\u5b9f\u88c5\u306b\u3088\u308b\u5149\u518d\u69cb\u6210\u306e\u9ad8\u901f\u5316\u624b\u6cd5\u300d,
          \u96fb\u5b50\u60c5\u5831\u901a\u4fe1\u5b66\u4f1a\u6280\u8853\u7814\u7a76\u5831\u544a(VLSI\u8a2d\u8a08\u6280\u8853\u7814\u7a76\u4f1a),
          Vol. 109, no. 201, VLD2009-41, pp. 67-70, \u5927\u962a\u5927\u5b66, 9\u6708, 2009.<\/li><\/ol>\n\n\n\n

          \u6240\u5c5e\u5b66\u4f1a<\/strong>
          \u30fbIEEE\u3000\u3000\u3000\u5b66\u751f\u4f1a\u54e1
          \u30fb\u96fb\u5b50\u60c5\u5831\u901a\u4fe1\u5b66\u4f1a\u3000\u3000\u3000\u5b66\u751f\u4f1a\u54e1<\/p>\n","protected":false},"excerpt":{"rendered":"

          \u8da3\u5473\uff1a\u6620\u753b\u9451\u8cde \u7814\u7a76\u30c6\u30fc\u30de\u30fb\u5149\u518d\u69cb\u6210\u578b\u30b2<\/p>\n","protected":false},"author":3,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"template-fullwidth.php","format":"standard","meta":{"_jetpack_memberships_contains_paid_content":false,"footnotes":""},"categories":[3,4],"tags":[],"class_list":["post-196","post","type-post","status-publish","format-standard","hentry","category-ob-og","category-member"],"jetpack_sharing_enabled":true,"jetpack_featured_media_url":"","_links":{"self":[{"href":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/wp-json\/wp\/v2\/posts\/196","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/wp-json\/wp\/v2\/users\/3"}],"replies":[{"embeddable":true,"href":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/wp-json\/wp\/v2\/comments?post=196"}],"version-history":[{"count":4,"href":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/wp-json\/wp\/v2\/posts\/196\/revisions"}],"predecessor-version":[{"id":345,"href":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/wp-json\/wp\/v2\/posts\/196\/revisions\/345"}],"wp:attachment":[{"href":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/wp-json\/wp\/v2\/media?parent=196"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/wp-json\/wp\/v2\/categories?post=196"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.rs.cs.okayama-u.ac.jp\/shizuoka-watanabe-lab\/wp-json\/wp\/v2\/tags?post=196"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}